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<p>The increasing complexity of Safety-Critical Real-Time Embedded Systems (SACRES) presents significant challenges regarding reliability, security, and trustworthiness. Key concerns include the system’s vulnerability to instantaneous voltage spikes, electromagnetic interference, neutron strikes, and temperatures out of range, which can induce bit-flipping and consequentially temporary corruption of stored memory data and soft errors. These errors may result in system faults that could push the system into dangerous states. In high-stakes fields like automotive, aerospace, and avionics, such failures can have serious, real-world consequences, potentially endangering lives. This paper introduces an innovative, fully configurable fault injection tool designed to monitor and analyze the micro-architectural state of the system. This tool allows a tailored injection campaign, including both CPU registers and RAM, with a flexible fault model able to inject single and multi-bit-flipping in the application and Operating System (OS) space. Tracking the architectural events using the microprocessor’s Performance Monitoring Unit (PMU) and debugging interface. A key feature is its ability to ensure the repeatability of fault injections, which focus on bit-flipping in memory systems. The results of these fault injections allow for a detailed analysis of how soft errors affect system performance, output integrity, and timing predictability, all of which are critical in SACRES.</p>

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Real-time Embedded System Fault Injector Framework for Micro-architectural State Based Reliability Assessment

  • 期刊论文

  • 出版模式：

    开放获取

  • 发表日期：

    2025年4月1日

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  • Enrico Magliano,
  • Alessandro Savino,
  • Stefano Di Carlo

摘要

The increasing complexity of Safety-Critical Real-Time Embedded Systems (SACRES) presents significant challenges regarding reliability, security, and trustworthiness. Key concerns include the system’s vulnerability to instantaneous voltage spikes, electromagnetic interference, neutron strikes, and temperatures out of range, which can induce bit-flipping and consequentially temporary corruption of stored memory data and soft errors. These errors may result in system faults that could push the system into dangerous states. In high-stakes fields like automotive, aerospace, and avionics, such failures can have serious, real-world consequences, potentially endangering lives. This paper introduces an innovative, fully configurable fault injection tool designed to monitor and analyze the micro-architectural state of the system. This tool allows a tailored injection campaign, including both CPU registers and RAM, with a flexible fault model able to inject single and multi-bit-flipping in the application and Operating System (OS) space. Tracking the architectural events using the microprocessor’s Performance Monitoring Unit (PMU) and debugging interface. A key feature is its ability to ensure the repeatability of fault injections, which focus on bit-flipping in memory systems. The results of these fault injections allow for a detailed analysis of how soft errors affect system performance, output integrity, and timing predictability, all of which are critical in SACRES.