Test Modules for Enhanced Testability of Single Flux Quantum Integrated Circuits

On-chip testability of superconductive electronic circuits is challenging due to the high clock frequencies and cryogenic environment, which in turn complicates the test/debug process. In this paper, circuit solutions to support design for testability (DFT) in single flux quantum (SFQ) systems are proposed. Two test modules, a test extraction module and a hybrid test module, are presented to enhance the controllability and observability of the internal nodes within SFQ systems. These test modules are validated on several benchmark circuits. A methodology is further proposed to explore tradeoffs (power, delay, area, and detection speed) of the modules. Additionally, controllability and observability testability measures are proposed. This methodology can be used to determine the quantity, type, location, and overhead of the proposed test modules to enhance DFT in SFQ systems with the fewest number of test vectors and highest possible fault coverage.