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<p>As chip dimensions approach their physical limits, unavoidable thermal effects and quantum tunneling phenomena necessitate novel solutions. This paper proposes an inverse design structure of an all-optical 4 × 2 encoder based on an insulator silicon substrate platform. This structure consists of four input waveguides, two output waveguides, and an optimization area with a size of 2.4&#xa0;μm × 2.4&#xa0;μm. This structure is designed through reverse engineering. The reverse design optimization algorithm adopts an improved particle swarm algorithm, which can enhance its global search capability and effectively avoid getting trapped in local optimal solutions. Measurements indicate that the normalized output power in the dual-channel pass state exceeds 0.43, while in the single-channel pass state it surpasses 0.75. The normalized output power in the non-pass state is zero. The proposed encoder structure features a compact footprint and small volume, capable of performing 4 × 2 encoder logic operations. Its design on an insulating silicon substrate platform facilitates integration into optical circuits.</p>

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Inverse design of a 4 × 2 photonic crystal encoder based on an improved particle swarm optimization algorithm

  • 期刊论文

  • 发表日期：

    2026年3月27日

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  • Cong Hu,
  • Tianhao Huang,
  • Tian Zhou,
  • Aijun Zhu,
  • Lijuan Zhang,
  • Xijun Huang

摘要

As chip dimensions approach their physical limits, unavoidable thermal effects and quantum tunneling phenomena necessitate novel solutions. This paper proposes an inverse design structure of an all-optical 4 × 2 encoder based on an insulator silicon substrate platform. This structure consists of four input waveguides, two output waveguides, and an optimization area with a size of 2.4 μm × 2.4 μm. This structure is designed through reverse engineering. The reverse design optimization algorithm adopts an improved particle swarm algorithm, which can enhance its global search capability and effectively avoid getting trapped in local optimal solutions. Measurements indicate that the normalized output power in the dual-channel pass state exceeds 0.43, while in the single-channel pass state it surpasses 0.75. The normalized output power in the non-pass state is zero. The proposed encoder structure features a compact footprint and small volume, capable of performing 4 × 2 encoder logic operations. Its design on an insulating silicon substrate platform facilitates integration into optical circuits.