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<p>The implementation of a neural network on very large-scale integrated (VLSI) circuits provides flexibility in programmable systems. However, conventional field-programmable gate array (FPGA) neural chips suffer from longer computation times, higher costs, and greater energy consumption. On the other hand, multilayer perceptron (MLP) network implementation over VLSI exhibits increased speed with a smaller chip size and reduced cost. This work aims to implement an MLP neural network using double-gate metal oxide semiconductor field effect transistors (DGMOSFETs) functioning as neurons. The suggested network architecture is offered as a package utilizing very high-speed integrated circuit hardware description language (VHDL). The weights of the MLP are obtained by training a neural network with electrocardiogram (ECG) signals taken from the PhysioNet database. The ECG input signals, obtained weights and bias, are given to the designed MLP for testing. The classification accuracy of this trained neural network is 94.48%. A power analysis is&#xa0;also conducted for the hardware-designed MLP to validate the power reduction performance. In terms of speed, the required number of components and power, the performance of this design employing DGMOSFET outperforms its single-gate MOSFET (SGMOSFET) counterpart.</p>

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Neural network implementation for smart medical systems with double-gate MOSFET

  • 期刊论文

  • 发表日期：

    2024年12月31日

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  • Epiphany Jebamalar Leavline,
  • Krishnasamy Vijayakanth

摘要

The implementation of a neural network on very large-scale integrated (VLSI) circuits provides flexibility in programmable systems. However, conventional field-programmable gate array (FPGA) neural chips suffer from longer computation times, higher costs, and greater energy consumption. On the other hand, multilayer perceptron (MLP) network implementation over VLSI exhibits increased speed with a smaller chip size and reduced cost. This work aims to implement an MLP neural network using double-gate metal oxide semiconductor field effect transistors (DGMOSFETs) functioning as neurons. The suggested network architecture is offered as a package utilizing very high-speed integrated circuit hardware description language (VHDL). The weights of the MLP are obtained by training a neural network with electrocardiogram (ECG) signals taken from the PhysioNet database. The ECG input signals, obtained weights and bias, are given to the designed MLP for testing. The classification accuracy of this trained neural network is 94.48%. A power analysis is also conducted for the hardware-designed MLP to validate the power reduction performance. In terms of speed, the required number of components and power, the performance of this design employing DGMOSFET outperforms its single-gate MOSFET (SGMOSFET) counterpart.