Cycle times in D/D/S series queues with single multi-server bottlenecks
摘要
In this work, we consider D/D/S series queues characterized by deterministic interarrival and service times, with a single multi-server bottleneck stage. When the arrival rate is greater than the bottleneck capacity—for a temporary window of time—the derivation of cycle time is not immediately clear, and warrants a formal proof.