<p>Understanding the fracture behavior of vertical cracks in piezoelectric semiconductor (PS) structures is vital due to their impacts on device reliability. This study establishes a model for a PS strip with a vertical crack under combined mechanical and electric loading, considering both central and edge cracks. Using Fourier transforms and dislocation density functions, the Mode-III problem is converted to Cauchy-type singular integral equations. The crack surface fields, intensity factors, and energy release rate are derived. The accuracy of the proposed model is verified through the finite element (FE) simulation via COMSOL Multiphysics. The results for low electron concentrations align with those of the intrinsic piezoelectric materials, validating the correctness of the present model as well. The combined effects of crack position, applied electric loading, and initial carrier concentration on the crack propagation are analyzed. The normalized electric displacement factor shows heightened sensitivity to crack size, electromechanical loading, and carrier concentration. The crack position significantly influences the crack surface fields and normalized intensity factors due to the boundary proximity effect.</p>