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<p>A new third-order sinusoidal oscillator is presented, employing three voltage conveyors (VCIIs), three resistors, and three grounded capacitors—a configuration highly suitable for CMOS integrated circuit implementation. The circuit offers independent control of the condition of oscillation and frequency of oscillation via virtually grounded resistors, which can be realized using MOSFETs or FETs. Compared to previously reported CC-based third-order oscillators, the proposed design offers significant advantages, including the generation of two distinct quadrature voltage outputs at the buffered ports of the VCIIs. The proposed design has been validated, demonstrating a frequency error and total harmonic distortion (THD) within 4% across the entire operating range. The functionality of the circuit has been verified through both experimental validations using AD844-type CFOAs and SPICE simulations based on 0.18&#xa0;µm CMOS process parameters.</p>

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Third order quadrature oscillator employing all grounded capacitors: an application of VCII

  • 期刊论文

  • 发表日期：

    2025年9月23日

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  • Tajinder Singh Arora,
  • Abdhesh Kumar Singh

摘要

A new third-order sinusoidal oscillator is presented, employing three voltage conveyors (VCIIs), three resistors, and three grounded capacitors—a configuration highly suitable for CMOS integrated circuit implementation. The circuit offers independent control of the condition of oscillation and frequency of oscillation via virtually grounded resistors, which can be realized using MOSFETs or FETs. Compared to previously reported CC-based third-order oscillators, the proposed design offers significant advantages, including the generation of two distinct quadrature voltage outputs at the buffered ports of the VCIIs. The proposed design has been validated, demonstrating a frequency error and total harmonic distortion (THD) within 4% across the entire operating range. The functionality of the circuit has been verified through both experimental validations using AD844-type CFOAs and SPICE simulations based on 0.18 µm CMOS process parameters.