Quantum-dot Cellular Automata (QCA) offers a promising paradigm for ultra-low-power nanoscale computing. This paper introduces a novel co-planar design of a 4-bit, three-input carry-save adder (QCA-3 \(\times\) 4B-CSA), leveraging an optimized full adder structure to enhance performance, reduce area, and minimize quantum cost. The proposed architecture is developed using QCADesigner v2.0.3 and benchmarked against state-of-the-art CSA implementations across multiple cell sizes (18 \(\times\) 18 nm, 16 \(\times\) 16 nm, and 14 \(\times\) 14 nm). The proposed design achieves a 76.35% reduction in quantum cost compared to recent CSA implementations, while also minimizing cell count, layout area, and delay. Energy dissipation metrics is evaluated using QCAPro and QCADesigner-E, confirming significant energy efficiency. Thermal analysis further reveals robust output polarization stability up to 8K, demonstrating the circuit’s resilience under cryogenic conditions. Notably, the 14 \(\times\) 14 nm cell layout delivers superior results across all performance metrics. These findings establish the QCA-3 \(\times\) 4B-CSA as robust and scalable solution for future nano scale digitalarithmetic systems.
