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<p>This paper presents a novel hybrid cryptographic framework combining the Hummingbird and PRESENT ciphers, optimized for FPGA implementation to secure resource-constrained IoT devices. The design addresses the critical need for lightweight, energy-efficient encryption that supports real-time data protection in environments with limited computational power and strict energy budgets. By integrating signal processing algorithms, the framework optimizes data flow, reduces latency, and enables efficient encryption and decryption operations. Leveraging FPGA’s parallelism and customizable hardware, the architecture achieves high throughput and low power consumption. The system’s performance is evaluated through key metrics including encryption speed, energy usage, and resilience against cryptanalytic attacks. Experimental results demonstrate a 25% reduction in latency and notable energy savings compared to existing solutions, without compromising security. The proposed framework is compact, adaptable, and suitable for deployment in diverse IoT applications where resource efficiency and strong security are essential. This work provides a practical and innovative approach to enhancing cryptographic protocols for next-generation IoT devices, meeting the dual objectives of robust protection and efficient hardware implementation.</p>

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A novel FPGA-based hybrid cryptographic architecture integrating hummingbird and PRESENT ciphers with signal processing techniques for enhanced security in resource-constrained IoT devices

  • 期刊论文

  • 发表日期：

    2025年8月28日

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  • V. Parthiban,
  • J. Raja

摘要

This paper presents a novel hybrid cryptographic framework combining the Hummingbird and PRESENT ciphers, optimized for FPGA implementation to secure resource-constrained IoT devices. The design addresses the critical need for lightweight, energy-efficient encryption that supports real-time data protection in environments with limited computational power and strict energy budgets. By integrating signal processing algorithms, the framework optimizes data flow, reduces latency, and enables efficient encryption and decryption operations. Leveraging FPGA’s parallelism and customizable hardware, the architecture achieves high throughput and low power consumption. The system’s performance is evaluated through key metrics including encryption speed, energy usage, and resilience against cryptanalytic attacks. Experimental results demonstrate a 25% reduction in latency and notable energy savings compared to existing solutions, without compromising security. The proposed framework is compact, adaptable, and suitable for deployment in diverse IoT applications where resource efficiency and strong security are essential. This work provides a practical and innovative approach to enhancing cryptographic protocols for next-generation IoT devices, meeting the dual objectives of robust protection and efficient hardware implementation.