Theoretical and hardware-level precising in MASH 1-1-1 modulators with eliminable dither
摘要
This manuscript explores Digital Delta-Sigma Modulators, commenting on the limitations of the eliminable dither in a Multi-stAge-noise-SHaping solution. The mathematical analysis in this work provides evidence, through a quantitative study, of the periodicity for eliminable dither and the Song and Park Multi-stAge-noise-SHaping modulators. The work presents the necessary considerations for the unexplored physical and digital synthesis implementation, commenting on the hardware limitations of the eliminable dither solution. The manuscript proposes a new dithering scheme with a feasible digital synthesis in a standard cell CMOS integrated circuit design. The solution uses an XOR-based signal feedback, extending the modulator’s periodicity with fourteen percent of additional hardware, representing a low-cost solution compared with similar systems.