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<p>The low cost of commercial-off-the-shelf static random access memory (SRAM) devices allows wide use in space applications. The proper functioning of microsatellites in orbit is ensured by data and instruction set (program) stored in these devices. The SRAM memory that operates in the space environment risks data corruption due to single-event upset (SEU) and single-event multiple-bit upset. Therefore error detection and correction (EDAC) based on shortened Hamming (12,8) code and quasi-cyclic (16,8) code are ordinarily used for protecting the SRAM against errors due to SEU. The proposed EDAC is based on the Single Error Correcting and Double Error Detecting Hsiao (72,64) code which is compared with the two previous EDACs in terms of the number of Field Programmable Gate Array that implements these codes, delay time for encoding/decoding operations, memory overhead, and error detection and correction capability.</p>

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SEC-DED-Hsiao code protection for SRAM memories used in space applications

  • 期刊论文

  • 发表日期：

    2025年4月22日

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  • Ghenam Dahmane,
  • Benabdellah Yagoubi

摘要

The low cost of commercial-off-the-shelf static random access memory (SRAM) devices allows wide use in space applications. The proper functioning of microsatellites in orbit is ensured by data and instruction set (program) stored in these devices. The SRAM memory that operates in the space environment risks data corruption due to single-event upset (SEU) and single-event multiple-bit upset. Therefore error detection and correction (EDAC) based on shortened Hamming (12,8) code and quasi-cyclic (16,8) code are ordinarily used for protecting the SRAM against errors due to SEU. The proposed EDAC is based on the Single Error Correcting and Double Error Detecting Hsiao (72,64) code which is compared with the two previous EDACs in terms of the number of Field Programmable Gate Array that implements these codes, delay time for encoding/decoding operations, memory overhead, and error detection and correction capability.