<p>Approximate computing is accepted for error-tolerant tasks including image and signal processing applications, where execution time is more critical than accuracy. Approximation in the multiplier design is considered highly beneficial due to reduced hardware requirements and yet achieves acceptable inference from the rendered output. A probabilistic approach to build approximate compressors specifically for Radix-4 modified booth multiplier is designed to provide power and footprint savings, and at the same time offer performance benefits with lesser errors. The inexact compressor design when applied on the booth encoded reduced partial products (PP) offers a significant improvement over the existing approximate multiplier design. Five variants of inexact multiplier designs were derived by placing approximate compressors across the columns of the Booth multiplier generated partial product matrix (PPM). Two additional design variants including truncation on the lower significant part of the PPM in the multiplier design were also investigated. All the proposed multiplier design variants were synthesized and characterized for hardware parameters, and error metrics. Two design configurations: Design-1 with the conventional approach of sign extending each PP rows till the <InlineEquation ID="IEq1"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="10470_2025_2327_Article_IEq1.gif" Format="GIF" Height="19" Rendition="HTML" Resolution="72" Type="Linedraw" Width="80" /> </InlineMediaObject> <EquationSource Format="TEX">$(2n-1){th}$</EquationSource> <EquationSource Format="MATHML"><math> <mrow> <mo stretchy="false">(</mo> <mn>2</mn> <mi>n</mi> <mo>-</mo> <mn>1</mn> <mo stretchy="false">)</mo> <mrow> <mi mathvariant="italic">th</mi> </mrow> </mrow> </math></EquationSource> </InlineEquation> bit in an <InlineEquation ID="IEq2"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="10470_2025_2327_Article_IEq2.gif" Format="GIF" Height="13" Rendition="HTML" Resolution="72" Type="Linedraw" Width="45" /> </InlineMediaObject> <EquationSource Format="TEX">$n\times n$</EquationSource> <EquationSource Format="MATHML"><math> <mrow> <mi>n</mi> <mo>×</mo> <mi>n</mi> </mrow> </math></EquationSource> </InlineEquation> multiplier, and Design-2 without sign extension with a modified PPM, are considered to evaluate all the seven proposed multiplier variants in each case. The <InlineEquation ID="IEq3"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="10470_2025_2327_Article_IEq3.gif" Format="GIF" Height="14" Rendition="HTML" Resolution="72" Type="Linedraw" Width="39" /> </InlineMediaObject> <EquationSource Format="TEX">$9\times 9$</EquationSource> <EquationSource Format="MATHML"><math> <mrow> <mn>9</mn> <mo>×</mo> <mn>9</mn> </mrow> </math></EquationSource> </InlineEquation> Design-1 achieved the maximum benefit of 46.27%, 61.18%, 16.79%, and 66.18% in footprint, power, delay, and overall product of delay and power (PDP), while Design-2 achieved the maximum of 61.33%, 77.54%, 41.45%, and 86.8% footprint, power, delay, and PDP savings respectively over their exact versions. <InlineEquation ID="IEq4"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="10470_2025_2327_Article_IEq4.gif" Format="GIF" Height="14" Rendition="HTML" Resolution="72" Type="Linedraw" Width="54" /> </InlineMediaObject> <EquationSource Format="TEX">$16\times 16$</EquationSource> <EquationSource Format="MATHML"><math> <mrow> <mn>16</mn> <mo>×</mo> <mn>16</mn> </mrow> </math></EquationSource> </InlineEquation> Design-2 variant exhibited the maximum of 11.29%, 32.01%, and 32.42% area, power and PDP improvements, respectively, among the evaluated design variants in comparison with the exact one. The proposed approximate multipliers also showcased superior Mean Relative Error Distance (MRED) and <InlineEquation ID="IEq5"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="10470_2025_2327_Article_IEq5.gif" Format="GIF" Height="16" Rendition="HTML" Resolution="72" Type="Linedraw" Width="38" /> </InlineMediaObject> <EquationSource Format="TEX">$P_{\textrm{RED}}$</EquationSource> <EquationSource Format="MATHML"><math> <msub> <mi>P</mi> <mtext>RED</mtext> </msub> </math></EquationSource> </InlineEquation> (Probability of getting an RED smaller than 2%) when compared with various existing works. The proposed design variants in this work were evaluated for the applications: image smoothing using the Gaussian filter, image segmentation using k-means clustering which is an unsupervised learning algorithm popularly used in computer vision systems, <InlineEquation ID="IEq6"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="10470_2025_2327_Article_IEq6.gif" Format="GIF" Height="17" Rendition="HTML" Resolution="72" Type="Linedraw" Width="62" /> </InlineMediaObject> <EquationSource Format="TEX">$\mu -law$</EquationSource> <EquationSource Format="MATHML"><math> <mrow> <mi>μ</mi> <mo>-</mo> <mi>l</mi> <mi>a</mi> <mi>w</mi> </mrow> </math></EquationSource> </InlineEquation> algorithm which is a standard companding algorithm mainly used in telecommunication systems, and Convolutional Neural Network (CNN) to present error-tolerant results.</p>

A probabilistic approach to design inexact compressors for approximate booth multipliers

期刊论文
发表日期：

2025年1月29日

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Bindu G Gowda,
H C Prashanth,
V N Muralidhara,
Madhav Rao

摘要

Approximate computing is accepted for error-tolerant tasks including image and signal processing applications, where execution time is more critical than accuracy. Approximation in the multiplier design is considered highly beneficial due to reduced hardware requirements and yet achieves acceptable inference from the rendered output. A probabilistic approach to build approximate compressors specifically for Radix-4 modified booth multiplier is designed to provide power and footprint savings, and at the same time offer performance benefits with lesser errors. The inexact compressor design when applied on the booth encoded reduced partial products (PP) offers a significant improvement over the existing approximate multiplier design. Five variants of inexact multiplier designs were derived by placing approximate compressors across the columns of the Booth multiplier generated partial product matrix (PPM). Two additional design variants including truncation on the lower significant part of the PPM in the multiplier design were also investigated. All the proposed multiplier design variants were synthesized and characterized for hardware parameters, and error metrics. Two design configurations: Design-1 with the conventional approach of sign extending each PP rows till the $(2n-1){th}$ $(2 n - 1) th$ bit in an $n\times n$ $n \times n$ multiplier, and Design-2 without sign extension with a modified PPM, are considered to evaluate all the seven proposed multiplier variants in each case. The $9\times 9$ $9 \times 9$ Design-1 achieved the maximum benefit of 46.27%, 61.18%, 16.79%, and 66.18% in footprint, power, delay, and overall product of delay and power (PDP), while Design-2 achieved the maximum of 61.33%, 77.54%, 41.45%, and 86.8% footprint, power, delay, and PDP savings respectively over their exact versions. $16\times 16$ $16 \times 16$ Design-2 variant exhibited the maximum of 11.29%, 32.01%, and 32.42% area, power and PDP improvements, respectively, among the evaluated design variants in comparison with the exact one. The proposed approximate multipliers also showcased superior Mean Relative Error Distance (MRED) and $P_{\textrm{RED}}$ $P_{RED}$ (Probability of getting an RED smaller than 2%) when compared with various existing works. The proposed design variants in this work were evaluated for the applications: image smoothing using the Gaussian filter, image segmentation using k-means clustering which is an unsupervised learning algorithm popularly used in computer vision systems, $\mu -law$ $μ - l a w$ algorithm which is a standard companding algorithm mainly used in telecommunication systems, and Convolutional Neural Network (CNN) to present error-tolerant results.