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<p>This paper proposes a 13-bit parallel two-step single slope (TS-SS) ADC for high-speed CMOS image sensors. The ADC design method is based on the ideas of time sharing and time compression, moves the fine conversion time to the coarse conversion time period, and eliminates the traditional method's time redundancy issue. The differential nonlinearity (DNL) and integral nonlinearity (INL) are simulated to be + 0.8/-0.8 LSB and + 2.1/-3.5 LSB, respectively, for the 55&#xa0;nm 1P4M CMOS process. 512&#xa0;ns is the conversion time of the 13-bit ADC. The power consumption is 47&#xa0;μW, and the effective number of bits (ENOB) is 11.33 bits. In comparison to existing advanced ADCs, the method proposed in this paper can increase the ADC conversion rate by more than 74.4% while maintaining low power consumption and high precision, thereby providing theoretical support for the readout and conversion of high-speed and high-precision CMOS image sensors.</p>

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A 512-ns conversion time 13-bit parallel two-step single-slope ADC for hundreds of mpxiel CMOS image sensors

  • 期刊论文

  • 发表日期：

    2025年1月30日

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  • Ruiming Xu,
  • Zhongjie Guo,
  • Changxu Su,
  • Suiyang Liu,
  • Ningmei Yu

摘要

This paper proposes a 13-bit parallel two-step single slope (TS-SS) ADC for high-speed CMOS image sensors. The ADC design method is based on the ideas of time sharing and time compression, moves the fine conversion time to the coarse conversion time period, and eliminates the traditional method's time redundancy issue. The differential nonlinearity (DNL) and integral nonlinearity (INL) are simulated to be + 0.8/-0.8 LSB and + 2.1/-3.5 LSB, respectively, for the 55 nm 1P4M CMOS process. 512 ns is the conversion time of the 13-bit ADC. The power consumption is 47 μW, and the effective number of bits (ENOB) is 11.33 bits. In comparison to existing advanced ADCs, the method proposed in this paper can increase the ADC conversion rate by more than 74.4% while maintaining low power consumption and high precision, thereby providing theoretical support for the readout and conversion of high-speed and high-precision CMOS image sensors.