A 12.5 Gb/s 1.38 mW all-inverter-based optical receiver with multi-stage feedback TIA and continuous-time linear equalizer

An optical receiver employs an all-inverter-based front-end design that provides maximum transconductance for a given power supply and allows for ultra-low power consumption. The feedback transimpedance amplifier (TIA) input stage utilizes a multi-stage amplifier to achieve a dramatic increase in feedback resistance and lower input-referred noise. Cascading an inverter-based active inductor continuous-time linear equalizer provides frequency peaking to compensate the input stage TIA that is intentionally designed with a reduced bandwidth to achieve adequate sensitivity at low power. Fabricated in 28 nm CMOS, the 12.5 Gb/s optical receiver achieves \(-\) $-$ 10.7 dBm OMA sensitivity at 0.11 pJ/bit energy efficiency and occupies only 720  \(\upmu \text {m}^{2}\) $\mathrm{\mu }{\text{m}}^2$ area.