Comprehensive analysis of fully depleted and partially depleted silicon-on-insulator FET device

This research paper explores the design and analysis of partially depleted silicon on insulator (PDSOI) MOSFET and fully depleted silicon on insulator (FDSOI) MOSFET. This paper presents a comprehensive analysis of both DC and RF parameters in PDSOI and FDSOI MOSFETs. The investigation involves varying surface silicon thickness, source/drain doping levels, gate metal work functions, box oxide thickness, gate oxide thickness, and channel length modulation. By studying these diverse device parameters, the paper aims to gain insights into the performance characteristics of PDSOI and FDSOI MOSFETs and their suitability for different applications in integrated circuits. The findings contribute to a better understanding of device optimization and guide future advancements in semiconductor technology. The SILVACO TCAD tool is utilized for all aspects of design and analysis in this study. A thorough investigation is conducted on the floating body and its associated kink effects in a PDSOI device.