Design and implementation of R4-MSD square root algorithm in ternary optical computer

The square root is one of the most important basic operations in computers. Based on the parallel carry-free TW-MSD adder, the parallel R4-MSD square root algorithm is proposed and presented. The algorithm is designed and implemented on the protype SD16 of ternary optical computer, which is developed by Shanghai University in 2016. The processes of the R4-MSD square root algorithm is described in detail. The optical experiment of the square root algorithm is presented based on the protype SD16 of ternary optical computer. It is proved that there are at most two square roots for MSD number representations of a positive decimal number within a given precision scope. It takes clock cycles to complete the square root of a MSD number of length n. This algorithm also shows that it requires the same clock cycle for multiple MSD numbers as for a single MSD number with the equal length. It is better than the radix-2 square root for MSD numbers and other embedded systems. Theoretical proof and optical experiments show that the parallel R4-MSD square root algorithm is feasible. It makes full use of the advantages of the ternary optical processor such as huge digits, bit function reconfiguration, and bit-based allocation.