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<p>This research focuses on the comparative analysis of the III-V study of junction-free and conventional double gate III-V TFETs for high power analog and RF applications, emphasizing their performance for future analog and RF applications. Using TCAD simulations, the effects of temperature variations and geometrical parameters on both device structures are investigated. Key performance metrics, including transconductance (<InlineEquation ID="IEq1"> <EquationSource Format="TEX">\(g_m\)</EquationSource> </InlineEquation>), threshold voltage (<InlineEquation ID="IEq2"> <EquationSource Format="TEX">\(V_t\)</EquationSource> </InlineEquation>), subthreshold swing (SS), cutoff frequency (<InlineEquation ID="IEq3"> <EquationSource Format="TEX">\(f_t\)</EquationSource> </InlineEquation>), maximum oscillation frequency (<InlineEquation ID="IEq4"> <EquationSource Format="TEX">\(f_{max}\)</EquationSource> </InlineEquation>), and the on/off current ratio (<InlineEquation ID="IEq5"> <EquationSource Format="TEX">\(I_{on}/I_{off}\)</EquationSource> </InlineEquation>) are analyzed. GaN-based TFETs demonstrate advantages such as high electron mobility, thermal stability, higher breakdown voltage, and wide bandgap. However, challenges such as limited current driving capability and ambipolar behavior restrict their performance. In contrast, JF-DG-TFETs provide greater design flexibility and enhanced gate control, leading to superior performance, particularly under cryogenic conditions. The simulation results reveal that GaN TFETs achieve an on-state current (<InlineEquation ID="IEq6"> <EquationSource Format="TEX">\(I_{on}\)</EquationSource> </InlineEquation>) of <InlineEquation ID="IEq7"> <EquationSource Format="TEX">\(6.8 \times 10^{-6}\)</EquationSource> </InlineEquation> A, an off-state current (<InlineEquation ID="IEq8"> <EquationSource Format="TEX">\(I_{off}\)</EquationSource> </InlineEquation>) of <InlineEquation ID="IEq9"> <EquationSource Format="TEX">\(80 \times 10^{-15}\)</EquationSource> </InlineEquation> A, an SS of 62 mV / Dec, transconductance (<InlineEquation ID="IEq10"> <EquationSource Format="TEX">\(g_m\)</EquationSource> </InlineEquation>) of <InlineEquation ID="IEq11"> <EquationSource Format="TEX">\(2.14 \times 10^{-3} \,\mu\)</EquationSource> </InlineEquation>S, and threshold voltage (<InlineEquation ID="IEq12"> <EquationSource Format="TEX">\(V_t\)</EquationSource> </InlineEquation>) of 0.64 V. Compared to others, JF-DG-TFETs demonstrate a 5.33% improvement in <InlineEquation ID="IEq13"> <EquationSource Format="TEX">\(V_t\)</EquationSource> </InlineEquation>, 28.87% enhancement in <InlineEquation ID="IEq14"> <EquationSource Format="TEX">\(g_m\)</EquationSource> </InlineEquation>, 58% reduction in SS, and 59% increase in <InlineEquation ID="IEq15"> <EquationSource Format="TEX">\(I_{on}/I_{off}\)</EquationSource> </InlineEquation>. It is well suited for next-generation ultra-high-power analog and RF power devices, showing significant potential for advanced high-power applications.</p>

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Performance evaluation of junction-free and conventional III-V double-gate TFET for high-power analog/RF applications

  • 期刊论文

  • 发表日期：

    2025年10月8日

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  • Tamilarasi Raja,
  • Karthik Sekhar

摘要

This research focuses on the comparative analysis of the III-V study of junction-free and conventional double gate III-V TFETs for high power analog and RF applications, emphasizing their performance for future analog and RF applications. Using TCAD simulations, the effects of temperature variations and geometrical parameters on both device structures are investigated. Key performance metrics, including transconductance ( \(g_m\) ), threshold voltage ( \(V_t\) ), subthreshold swing (SS), cutoff frequency ( \(f_t\) ), maximum oscillation frequency ( \(f_{max}\) ), and the on/off current ratio ( \(I_{on}/I_{off}\) ) are analyzed. GaN-based TFETs demonstrate advantages such as high electron mobility, thermal stability, higher breakdown voltage, and wide bandgap. However, challenges such as limited current driving capability and ambipolar behavior restrict their performance. In contrast, JF-DG-TFETs provide greater design flexibility and enhanced gate control, leading to superior performance, particularly under cryogenic conditions. The simulation results reveal that GaN TFETs achieve an on-state current ( \(I_{on}\) ) of \(6.8 \times 10^{-6}\) A, an off-state current ( \(I_{off}\) ) of \(80 \times 10^{-15}\) A, an SS of 62 mV / Dec, transconductance ( \(g_m\) ) of \(2.14 \times 10^{-3} \,\mu\) S, and threshold voltage ( \(V_t\) ) of 0.64 V. Compared to others, JF-DG-TFETs demonstrate a 5.33% improvement in \(V_t\) , 28.87% enhancement in \(g_m\) , 58% reduction in SS, and 59% increase in \(I_{on}/I_{off}\) . It is well suited for next-generation ultra-high-power analog and RF power devices, showing significant potential for advanced high-power applications.