<p>In weak grid conditions, the dynamic interaction between the phase-locked loop (PLL) of a grid-connected inverter (GCI) and the grid impedance may induce low-frequency oscillations or even instability. Conventional stability criteria, however, fail to adequately account for the frequency coupling effect (FCE), resulting in inaccurate stability assessments. To mitigate these challenges, a symmetric inertial PLL with frequency adaptation (SIPLL-FA) is proposed to enhance system stability and robustness. First, an inverter output impedance model that incorporates FCE is established to reveal its impact on impedance characteristics. Then, the dual role of the symmetric PLL (SPLL) is examined, demonstrating its capability to suppress FCE while revealing potential stability trade-offs. Furthermore, an inertial PLL with frequency adaptation (IPLL-FA) is designed by integrating an inertial loop filter with a frequency adaptation mechanism, which preserves the inherent stability margin advantage of Type-I PLLs while significantly mitigating phase errors caused by frequency variations. Finally, by extending this structure to a symmetric form, effective suppression of FCE is achieved, culminating in the SIPLL-FA. Theoretical analysis demonstrates that SIPLL-FA alleviates the negative damping effect induced by FCE, improves damping characteristics, and broadens the system’s stable operating range. Hardware-in-the-loop (HIL) experiments validate the effectiveness of the proposed approach.</p>

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Design of a symmetric inertial phase-locked loop with frequency adaptation for stability enhancement of grid-connected inverter in weak grid

  • Yibo Li,
  • Wei Cai,
  • Qingbo Guo,
  • Jiuliang Sun,
  • Lei Yang

摘要

In weak grid conditions, the dynamic interaction between the phase-locked loop (PLL) of a grid-connected inverter (GCI) and the grid impedance may induce low-frequency oscillations or even instability. Conventional stability criteria, however, fail to adequately account for the frequency coupling effect (FCE), resulting in inaccurate stability assessments. To mitigate these challenges, a symmetric inertial PLL with frequency adaptation (SIPLL-FA) is proposed to enhance system stability and robustness. First, an inverter output impedance model that incorporates FCE is established to reveal its impact on impedance characteristics. Then, the dual role of the symmetric PLL (SPLL) is examined, demonstrating its capability to suppress FCE while revealing potential stability trade-offs. Furthermore, an inertial PLL with frequency adaptation (IPLL-FA) is designed by integrating an inertial loop filter with a frequency adaptation mechanism, which preserves the inherent stability margin advantage of Type-I PLLs while significantly mitigating phase errors caused by frequency variations. Finally, by extending this structure to a symmetric form, effective suppression of FCE is achieved, culminating in the SIPLL-FA. Theoretical analysis demonstrates that SIPLL-FA alleviates the negative damping effect induced by FCE, improves damping characteristics, and broadens the system’s stable operating range. Hardware-in-the-loop (HIL) experiments validate the effectiveness of the proposed approach.