Topology optimization of patch arrays with individual element configurations based on model order reduction

Patch arrays with individual element configurations achieve merits for specific functions in wireless applications, where the patch element configurations should be carefully designed to meet the desired performance. As an intelligent design method, topology optimization allows the topology of a structure to evolve freely and automatically, thereby enabling the identification of performance-driven designs. Despite its attractive advantages, topology optimization is difficult for individual element design in electromagnetic arrays, because all elements must be designed collaboratively due to the full-field electromagnetic (EM) coupling, which leads to a large-scale full-wave analysis model and makes the iterative optimization extremely computationally intensive. To address this issue, this paper proposes an efficient topology optimization method for designing individual element configurations of patch arrays based on model order reduction. First, the topological configuration of the patch element is modeled by an equivalent impedance layer, and all patch elements share an identical background mesh, which enables both efficient updating and memory-efficient storage of the large-scale dense impedance matrix during optimization. Secondly, synthetic basis functions are employed to further reduce the dimensions of the governing equation and adjoint equation used for sensitivity analysis, allowing them to be solved efficiently. Compared with directly solving the full-order governing equations, the proposed method saves significant computational time in each iteration of the optimization design. The main contribution of the proposed method is its ability to effectively design individual element configurations of patch arrays with large-scale design variables while satisfying the design requirements. Typical patch arrays are designed to verify the effectiveness of the proposed method.