<p>The Phase-Locked Loop (PLL) is one of the fundamental building blocks of modern mixed-signal systems utilized across communication, control, and signal processing applications. One of the most significant challenges with performing conventional functional tests on PLLs is that performance can be affected due to permanent defects, as well as manufacturing process and environmental variances. In this paper, a relatively new method for detecting faults in Charge Pump (CP) PLLs using Back Propagation Neural Networks (BPNN) and Probabilistic Neural Networks (PNN) is presented. A dataset containing 7200 samples of transistor-level simulations of a CP-PLL using the different threshold voltages (Vth), oxide thicknesses (Tox), and temperatures is used in the development of the classifiers. Seven fault classes is defined for the CP-PLL: Fault-free (FF), Drain Open (DO), Source Open (SO), Drain to Source Short (DSS), Gate to Drain Short (GDS), Gate to Source Short (GSS), and Gate Open (GO). Data were divided into training and testing/validation. The test set included newly generated process and environmental variations that had not been seen previously and were used to assess the robustness of the trained classifiers. The experiments demonstrated that the suggested PNN classifier accomplished an overall fault classification accuracy of 99.6%, which included an average precision of 0.9965, average recall of 0.9965, and average F1-score of 0.9964, across all fault classes. Work was based on complete circuit-level simulation. Consequently, the developed framework for automated fault classification based on PNNs provides a cost-effective, accurate, and fast solution for automated PLL fault identification in mixed-signal integrated circuits.</p>