Scholarlink

<p>This research presents a miniature charge-controlled memristor emulator that employs a single MOSFET and a single MOSCAP, operating without supplementary bias. The design supports a wide frequency range from 1&#xa0;kHz to 40&#xa0;MHz at different capacitance and functions at a low supply voltage of ± 0.45&#xa0;V. The emulator, developed and validated in Cadence Virtuoso using standard 90&#xa0;nm GPDK CMOS technology, exhibits notable memristive behavior defined by a pinched hysteresis loop in the <i>I</i>–<i>V</i> plane. Its streamlined architecture reduces component count and power consumption compared to conventional systems. The proposed emulator is evaluated in two application domains. Initially, it is included into a CMOS Schmitt trigger, demonstrating configurable threshold levels and programmable hysteresis, so enhancing noise immunity. Secondly, it is employed in memristor-capacitor-based filters (low-pass, high-pass, and band-pass), exhibiting frequency-dependent performance and accurate tuning via memristance modulation. The simulation results validate its dynamic switching, stability, and performance across the whole operational frequency spectrum. The design offers a practical, scalable, and energy-efficient solution for analog computing, neuromorphic systems, and reconfigurable signal processing.</p>

错误：搜索内容不能为空，请输入英文关键词
错误：关键词超出字数限制，请精简
高级检索

A Compact Floating-Gate Diode-Connected MOSFET Memristor Emulator for Low-Voltage Analog Applications

  • 期刊论文

  • 发表日期：

    2025年11月27日

查看全文
  • Kunal Kaushik,
  • Mukul Jangid,
  • Gaurav M. Khanal,
  • Aaishi Dubey,
  • Sanjeev Kumar,
  • Satinder K. Sharma,
  • Arun K. Singh

摘要

This research presents a miniature charge-controlled memristor emulator that employs a single MOSFET and a single MOSCAP, operating without supplementary bias. The design supports a wide frequency range from 1 kHz to 40 MHz at different capacitance and functions at a low supply voltage of ± 0.45 V. The emulator, developed and validated in Cadence Virtuoso using standard 90 nm GPDK CMOS technology, exhibits notable memristive behavior defined by a pinched hysteresis loop in the I–V plane. Its streamlined architecture reduces component count and power consumption compared to conventional systems. The proposed emulator is evaluated in two application domains. Initially, it is included into a CMOS Schmitt trigger, demonstrating configurable threshold levels and programmable hysteresis, so enhancing noise immunity. Secondly, it is employed in memristor-capacitor-based filters (low-pass, high-pass, and band-pass), exhibiting frequency-dependent performance and accurate tuning via memristance modulation. The simulation results validate its dynamic switching, stability, and performance across the whole operational frequency spectrum. The design offers a practical, scalable, and energy-efficient solution for analog computing, neuromorphic systems, and reconfigurable signal processing.