<p>This work proposes a time-based (TB) pulse amplitude modulation (PAM)-4 transceiver with a linear voltage-to-time converter (VTC) and a single-path decoder with fast-stochastic calibration techniques. In the TB transceiver, the VTC converts the signal from the voltage-domain to the time-domain. First, the proposed linear VTC achieves a ratio of level mismatch of 0.96 for PAM-4 signaling using a feedback resistor. Second, the single-path decoder is proposed to reduce the number of delay cells and time comparators. Additionally, since the proposed decoding scheme requires an accurate time-threshold, the time-threshold calibration is presented. Third, this work calibrates the VTC gain, reference voltage, and decision feedback equalizer (DFE). The fast-stochastic calibration algorithm is also proposed to reduce the calibration time. The proposed TB PAM-4 was fabricated in a CMOS 65 nm process. The supply voltage margin is improved by 50 % with the proposed calibration techniques.</p>

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A Time-Based PAM-4 Transceiver Using Linear Voltage-to-Time Converter and Single Path PAM-4 Decoder with Fast-Stochastic Calibration

  • Dong-Hyun Yoon,
  • He Junsen,
  • Kiho Seong,
  • Kwang-Hyun Baek,
  • Youngdon Choi,
  • Jung-Hwan Choi,
  • Tony Tae-Hyoung Kim

摘要

This work proposes a time-based (TB) pulse amplitude modulation (PAM)-4 transceiver with a linear voltage-to-time converter (VTC) and a single-path decoder with fast-stochastic calibration techniques. In the TB transceiver, the VTC converts the signal from the voltage-domain to the time-domain. First, the proposed linear VTC achieves a ratio of level mismatch of 0.96 for PAM-4 signaling using a feedback resistor. Second, the single-path decoder is proposed to reduce the number of delay cells and time comparators. Additionally, since the proposed decoding scheme requires an accurate time-threshold, the time-threshold calibration is presented. Third, this work calibrates the VTC gain, reference voltage, and decision feedback equalizer (DFE). The fast-stochastic calibration algorithm is also proposed to reduce the calibration time. The proposed TB PAM-4 was fabricated in a CMOS 65 nm process. The supply voltage margin is improved by 50 % with the proposed calibration techniques.