<p>Device performance reduction with scaling is major concern for future technology enhancement and can be reduced by choosing new promising devices such as Nanosheet FET. Nanosheet FET provides better electrostatic control because of GAA structure. For the first time charge plasma Dopingless technique has been explored for stacked Nanosheet FET to achieve higher effective width for better current driving capacity. Novel charge plasma based vertically stacked Dopingless Nanosheet Field Effect Transistor (DL-NSFET) is proposed and analyzed in this article. Charge plasma technique is used in the proposed device to induce charge carriers by using metals with specific work functions. In charge plasma technique nanosheet thickness is kept equal and smaller than the Debye length for induction of charge carriers. Several analog characteristics and device parameters are calculated and compared with the existing Junctionless NSFET (JL-NSFET) to observe the behavior of device. Proposed device shows 2.78 times higher I_on, 4.4 times less I_off, 12.32 times more I_on/I_off ratio in comparison to JL-NSFET. Subthreshold swing of 61.1&#xa0;mV/Dec and 15.65&#xa0;mV/V DIBL is obtained. Parametric variation analysis of the proposed device is also carried out in terms of Lg, Tns, Wns and EOT.</p>