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Single and Two Pole Analysis Based Delay and Voltage Models for RLCG Interconnect Network

  • Vikas Maheshwari,
  • Hemant Patidar,
  • Neha Gupta,
  • Rajib Kar

摘要

The analysis of signal transmission in Very Large Scale Integrated (VLSI) circuit, begins with a LC/RLC interconnect line representation which is lossless and low frequency interconnection. The transmission of signal of high frequency through interconnect networks can be modelled as a distributed RLCG transmission line interconnections. In this work delay and voltage models for RLCG type transmission lines are obtained by using single and two pole methodology using the concept of the first two moments of the transfer function of RLCG interconnects. In the proposed models, the closed form formulas are derived theoretically for the analytical delay, single pole delay and two-pole delay. Proposed single pole delay model and two-pole delay models’ estimations are within 2.8% and 2.1% of SPICE delay estimation. The proposed approaches for various voltage and delay models have advantages in accuracy, novelty and minimum time required for simulation over the other existing models.