Energy-Efficient Exact and Approximate CNTFET-Based Ternary Full Adders

Ternary circuits are promising due to their lower interconnect complexity, storage requirement, and lesser pin count than binary circuits. The adder is one of the most important building blocks of a digital processor. This paper proposes carbon nanotube field effect transistor (CNTFET)-based ‘exact’ and ‘approximate’ ternary full adders (TFA). The CNTFET is attractive for realizing multi-valued logic (MVL)/ternary circuits because its threshold voltage can be changed by altering the diameter of its carbon nanotube (CNT). The exact ternary adders are realized using unary functions and multiplexers. The circuit size of only the ‘Sum’ block of a TFA is pruned in approximate ternary full adders by varying degrees for achieving superior performance in terms of transistor count, delay, and power consumption compared to the ‘exact’ TFAs. This performance gain in approximate TFAs is obtained at the cost of accuracy in some of the ‘Sum’ outputs. Circuits are simulated with HSPICE using a 32 nm CNTFET technology node at various supply voltages and temperatures. The proposed exact adders exhibit lower power consumption and transistor count, higher robustness, and lower power delay product (PDP) and energy delay product (EDP) than existing ternary adders. The improvement in PDP of the proposed exact TFAs varies from 20 to 96% compared to existing TFAs. The performance of the exact TFAs is then further improved by approximating its ‘Sum’ block in approximate TFAs. Image blending is used to demonstrate the effectiveness of approximate ternary adders in error-tolerant applications.